Differences

This shows you the differences between two versions of the page.

--- en:multiasm:papc:chapter_6_7 [2025/10/23 12:10] – [BMI1 and BMI2 Instructions] ktokarz
+++ en:multiasm:papc:chapter_6_7 [2025/10/23 12:56] (current) – [BMI1 and BMI2 Instructions] ktokarz
@@ Line 558: / Line 558: @@
 </figure>
-The **blsr** instruction resets (clears bits to zero values) the lowest set bit. It is shown in figure {{ref>blsr_instr}}.
+The **blsr** instruction resets (clears the bit to zero value) the lowest set bit. It is shown in figure {{ref>blsr_instr}}.
 <figure blsr_instr>
@@ Line 572: / Line 572: @@
 </figure>
-PDEP Parallel deposit of bits using a mask.
+The **pdep** instruction performs a parallel deposit of bits using a mask. Its behaviour is shown in figure {{ref>pdep_instr}}.
-PEXT Parallel extraction of bits using a mask.
+<figure pdep_instr>
+{{ :en:multiasm:cs:pdep.png?600 |Illustration of the parallel deposit instruction}}
+<caption>Illustration of the parallel deposit instruction</caption>
+</figure>
+The **pext** instruction performs a parallel extraction of bits using a mask. Its behaviour is shown in figure {{ref>pext_instr}}.
+<figure pext_instr>
+{{ :en:multiasm:cs:pext.png?600 |Illustration of the parallel extraction instruction}}
+<caption>Illustration of the parallel extraction instruction</caption>
+</figure>

en/multiasm/papc/chapter_6_7.1761221420.txt.gz · Last modified: 2025/10/23 12:10 by ktokarz