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| en:multiasm:papc:chapter_6_7 [2025/10/23 11:54] – [BMI1 and BMI2 Instructions] ktokarz | en:multiasm:papc:chapter_6_7 [2025/10/23 12:56] (current) – [BMI1 and BMI2 Instructions] ktokarz |
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| </figure> | </figure> |
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| The **blsi** instruction extracts the lowest set of bits starting from the specified position, as shown in figure {{ref>blsi_instr}}. | The **blsi** instruction extracts the single, lowest bit set to one, as shown in figure {{ref>blsi_instr}}. |
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| <figure blsi_instr> | <figure blsi_instr> |
| {{ :en:multiasm:cs:blsi.png?400 |Illustration of lowest bit set extraction instruction}} | {{ :en:multiasm:cs:blsi.png?400 |Illustration of the lowest set bit extraction instruction}} |
| <caption>Illustration of losert bit set extraction instruction</caption> | <caption>Illustration of lowest set bit extraction instruction</caption> |
| </figure> | </figure> |
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| BLSMSK Set all lower bits below first set bit to 1. | The **blsmsk** instruction sets all lower bits below a first bit set to 1. It is shown in figure {{ref>blsmsk_instr}}. |
| BLSR Reset lowest set bit. | |
| BZHI Zero high bits starting from specified bit position. | |
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| PDEP Parallel deposit of bits using a mask. | <figure blsmsk_instr> |
| PEXT Parallel extraction of bits using a mask. | {{ :en:multiasm:cs:blsmsk.png?400 |Illustration of the instruction which sets all lower bits below a first bit set to 1.}} |
| | <caption>Illustration of the instruction which sets all lower bits below a first bit set to 1</caption> |
| | </figure> |
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| | The **blsr** instruction resets (clears the bit to zero value) the lowest set bit. It is shown in figure {{ref>blsr_instr}}. |
| | |
| | <figure blsr_instr> |
| | {{ :en:multiasm:cs:blsr.png?400 |Illustration of the instruction which resets a first bit set to 1.}} |
| | <caption>Illustration of the instruction which resets a first bit set to 1</caption> |
| | </figure> |
| | |
| | The **bzhi** instruction resets high bits starting from the specified bit position, as shown in figure {{ref>bzhi_instr}}. |
| | |
| | <figure bzhi_instr> |
| | {{ :en:multiasm:cs:bzhi.png?400 |Illustration of the instruction which resets high bits starting from the specified bit position.}} |
| | <caption>Illustration of the instruction which resets high bits starting from the specified bit position</caption> |
| | </figure> |
| | |
| | The **pdep** instruction performs a parallel deposit of bits using a mask. Its behaviour is shown in figure {{ref>pdep_instr}}. |
| | |
| | <figure pdep_instr> |
| | {{ :en:multiasm:cs:pdep.png?600 |Illustration of the parallel deposit instruction}} |
| | <caption>Illustration of the parallel deposit instruction</caption> |
| | </figure> |
| | |
| | The **pext** instruction performs a parallel extraction of bits using a mask. Its behaviour is shown in figure {{ref>pext_instr}}. |
| | |
| | <figure pext_instr> |
| | {{ :en:multiasm:cs:pext.png?600 |Illustration of the parallel extraction instruction}} |
| | <caption>Illustration of the parallel extraction instruction</caption> |
| | </figure> |
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