Interrupt Controller, Interrupts

An interrupt is a request to the processor to temporarily suspend the currently executing code in order to handle the event that caused the interrupt. If the request is accepted by the processor, it saves its state and performs a function named an interrupt handler or interrupt service routine (ISR). Interrupts are usually signalled by peripheral devices in a situation while they have some data to process. Often, peripheral devices do not send an interrupt signal directly to the processor, but there is an interrupt controller in the system that collects requests from various peripheral devices. The interrupt controller prioritizes the peripherals to ensure that the more important requests are handled first.

The interrupt signal comes asynchronously which means that it can come during execution of the instruction. Usually, the processor finishes this instruction and then calls the interrupt handler. To be able to handle interrupts the processor must implement the mechanism of storing the address of the next instruction to be executed in the interrupted code. Some implementations use the stack while some use a special register to store the returning address. The latter approach requires software support if interrupts can be nested (if the interrupt can be accepted while already in another ISR).

After finishing the interrupt subroutine processor uses the returning address to return back program control to the interrupted code.

The Fig. 1 shows how interrupt works with stack use. The processor executes the program. When an interrupt comes it saves the return address on the stack. Next jumps to the interrupt handler. With return instruction processor returns to the program taking the address of an instruction to execute from the stack.

Fixed – microcontrollers. every interrupt handler has its own fixed starting address. Vectored – microprocessors. one interrupt pin, peripheral sends address of handler through data bus. Indexed – microprocessors. peripheral sends number of the interrupt – index in the table of handlers' addresses.

Maskable interrupt – can be disabled with the special flag. Interrupts usually can be masked. In microcotrollers separate bits for different interrupts. Disabling interrupts for time critical code.

Non maskable interrupt – cannot be disabled. Separate interrupt input – NMI. Reserved usually for critical situation: Memory failure Power down

Level triggered. While interrupt handler is finished and interrupt signal is still active interrupt is signalled again. Low level on interrput input. High level on interrupt input. Edge triggered. Interrupt is signalled only while there is a change on interrupt input. Falling edge of interrupt signal. Rising edge of interrupt signal.

Software interrupts Internal interrupts Exception – generated by abnormal behavior in some instructions (dividing by 0). Trap – intentionally initiated by programmer transfer control to handler routine (debugging). Fault – generated while detecting some errors in the program (memory protection, invalid code of operation).