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en:iot-open:introduction:introduction_to_iot_communication_and_protocols [2019/05/24 15:24] – irena.skardaen:iot-open:introduction:introduction_to_iot_communication_and_protocols [2020/07/20 09:00] (current) – external edit 127.0.0.1
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 ===== Embedded Systems Communication Protocols ===== ===== Embedded Systems Communication Protocols =====
-Understanding the principals of the communication are essential for further reading on hardware and programming. Most microcontrollers (including SoCs) can communicate in the protocols juxtaposed below right "out of the box". Interfaces can be implemented in hardware or (recently) in software. Some microcontrollers may require an external, dedicated protocol converter (a chip or a module).+<box #5374d5></box> 
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 +Understanding the principals of communication are essential for further reading on hardware and programming. Most microcontrollers (including SoCs) can communicate in the protocols juxtaposed below right "out of the box". Interfaces can be implemented in hardware or (recently) in software. Some microcontrollers may require an external, dedicated protocol converter (a chip or a module).
  
 IoT systems are typically structured into three basic layers ((Internet of Things: Security Vulnerabilities and Challenges Ioannis Andrea, Chrysostomos Chrysostomou, George Hadjichristofi, The 3rd IEEE ISCC 2015 International Workshop on Smart City and Ubiquitous Computing Applications, https://doi.org/10.1109/ISCC.2015.7405513)). The lowest layer is the Perception (physical, acquisition) Layer, the intermediate is the Network Layer, and the higher is the Application Layer.  IoT systems are typically structured into three basic layers ((Internet of Things: Security Vulnerabilities and Challenges Ioannis Andrea, Chrysostomos Chrysostomou, George Hadjichristofi, The 3rd IEEE ISCC 2015 International Workshop on Smart City and Ubiquitous Computing Applications, https://doi.org/10.1109/ISCC.2015.7405513)). The lowest layer is the Perception (physical, acquisition) Layer, the intermediate is the Network Layer, and the higher is the Application Layer. 
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 ====Digital==== ====Digital====
-Dummy, true/false information can be processed via digital I/O. Most devices use positive logic, where, i.e. +5 V (TTL) or +3.3 V (those are the most popular, yet there do exist other voltage standards) presents a logical one, while 0V presents logical zero. In real systems this bounding is fuzzy and brings some tolerance, simplifying, i.e. communication from 3.3 V output to 5 V input, without a need of the conversion (note, reverse conversion is usually not so straightforward, as 3.3 V inputs driven by 5V output may burn easily). A sample of the sensor providing binary data is a button (On/Off).+Dummy, true/false information can be processed via digital I/O. Most devices use positive logic, where, i.e. +5 V (TTL) or +3.3 V (those are the most popular, yet there do exist other voltage standards) presents a logical one, while 0V presents logical zero. In real systems this bounding is fuzzy and brings some tolerance, simplifying, i.e. communication from 3.3 V output to 5 V input, without a need of the conversion (note, the reverse conversion is usually not so straightforward, as 3.3 V inputs driven by 5V output may burn easily). A sample of the sensor providing binary data is a button (On/Off).
  
 ====SPI==== ====SPI====
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 </table> </table>
  
-It results in different timings of the clock signal concerning the data sent. Clock polarity = 0 means that the idle state of the SCK is 0 so every data bit is synchronised with the pulse of logic 1. Clock polarity = 1 reverses these states. Output edge (rising/falling) says at which edge of active SCK signal sender puts a bit on the data line. Data capture edge says at what edge of SCK signal data should be captured by the receiver.+It results in different timings of the clock signal concerning the data sent. Clock polarity = 0 means that the idle state of the SCK is 0, so every data bit is synchronised with the pulse of logic 1. Clock polarity = 1 reverses these states. Output edge (rising/falling) says at which edge of active SCK signal sender puts a bit on the data line. Data capture edge says at what edge of SCK signal data should be captured by the receiver.
 ====TWI (I2C)==== ====TWI (I2C)====
-TWI (Two Wire Interface) is one of the most popular communication protocol used in embedded systems. It has been designed by Philips as I2C (Inter-Integrated Circuit) for using in the audio-video appliances controlled by the microprocessor. There are many chips that can be connected to the processor with this interface including:+TWI (Two Wire Interface) is one of the most popular communication protocol used in embedded systems. It has been designed by Philips as I2C (Inter-Integrated Circuit) for using in the audio-video appliances controlled by the microprocessor. There are many chips that can be connected to the processor with this interface, including:
   *   EEPROM memory chips,   *   EEPROM memory chips,
   *   RAM memory chips,   *   RAM memory chips,
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   *   port extenders,   *   port extenders,
   *   displays,   *   displays,
-  *   specialized AV circuits. +  * specialised AV circuits. 
-TWI, as the name says, uses two wires for communication. One is the data line (SDA) the second is the clock line (SCL). Both lines are common to all circuits connected to the one TWI bus. The method of the communication of TWI is the master-slave synchronous serial transmission. It means that data is sent bit after bit synchronised with the clock signal. SCL line is always controlled by the master unit (usually the processor), the signal on the SDA line is generated by the master or one of the slaves – depending on the direction of communication. The frequency rate of the communication is up to 100 kHz for most of the chips, for some can be higher – up to 400 kHz. New implementation allows even higher frequency rate is reaching 5 MHz.+TWI, as the name says, uses two wires for communication. One is the data line (SDA); the second is the clock line (SCL). Both lines are common to all circuits connected to the one TWI bus. The method of the communication of TWI is the master-slave synchronous serial transmission. It means that data is sent bit after bit synchronised with the clock signal. SCL line is always controlled by the master unit (usually the processor), the signal on the SDA line is generated by the master or one of the slaves – depending on the direction of communication. The frequency rate of the communication is up to 100 kHz for most of the chips, for some can be higher – up to 400 kHz. The new implementation allows even higher frequency rate is reaching 5 MHz.
 At the output side of units, the lines have the open-collector or open-drain circuit. It means that there are external pull-up resistors needed to ensure proper operation of the TWI bus. Value of these resistors depends on the number of connected elements, speed of transmission and the power supply voltage and can be calculated with the formulas presented in Texas Instrument Application Report ((Rajan Arora, I2C Bus Pullup Resistor Calculation, Texas Instruments Application Report)). Usually, it is assumed between 1 kΩ and 4.7 kΩ. At the output side of units, the lines have the open-collector or open-drain circuit. It means that there are external pull-up resistors needed to ensure proper operation of the TWI bus. Value of these resistors depends on the number of connected elements, speed of transmission and the power supply voltage and can be calculated with the formulas presented in Texas Instrument Application Report ((Rajan Arora, I2C Bus Pullup Resistor Calculation, Texas Instruments Application Report)). Usually, it is assumed between 1 kΩ and 4.7 kΩ.
  
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 </figure> </figure>
  
-The data is sent using frames of bytes. Every frame begins with the sequence of signals that is called the start condition. This sequence is detected by slaves and causes them to collect the next eight bits that form the address byte – unique for every circuit on the bus. If one of the slaves recognises its address remains active until the end of the communication frame, others become inactive. To inform master that some unit has been appropriately addressed slave responses with the acknowledge bit – it generates one bit of low level on the SDA line (the master generates clock pulse). After sending proper address data bytes are sent. The direction of the data bytes is controlled by the last bit of the address, for 0 data is transmitted by the master (Write), for 1 data is sent by the slave (Read). The receiving unit must acknowledge every full byte (eight bits). There is no limitation on the number of data bytes in the frame, for example, samples from the AD converter can be read byte continuously after byte. At the end of the frame another special sequence is sent by the master – stop condition. It is also possible to generate another start condition without the stop condition. It is called repeated start condition.+The data is sent using frames of bytes. Every frame begins with the sequence of signals that is called the start condition. This sequence is detected by slaves and causes them to collect the next eight bits that form the address byte – unique for every circuit on the bus. If one of the slaves recognises its address remains active until the end of the communication frame, others become inactive. To inform the master that some unit has been appropriately addressed slave responses with the acknowledge bit – it generates one bit of low level on the SDA line (the master generates clock pulse). After sending the proper address, data bytes are sent. The direction of the data bytes is controlled by the last bit of the address, for 0 data is transmitted by the master (Write), for 1 data is sent by the slave (Read). The receiving unit must acknowledge every full byte (eight bits). There is no limitation on the number of data bytes in the frame, for example, samples from the AD converter can be read byte continuously after byte. At the end of the frame, another special sequence is sent by the master – stop condition. It is also possible to generate another start condition without the stop condition. It is called a repeated start condition.
  
 <figure Ref.Pic.3> <figure Ref.Pic.3>
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 Address byte activates one chip on the bus only, so every unit must have a unique physical address. This byte usually consists of three elements: 4-bit field fixed by the producer, 3-bit field that can be set by connecting three pins of the chip to 0 (ground) or 1 (positive supply line), 1-bit field for setting the direction of communication (R/#W). Some elements (e.g. EEPROM memory chips) uses the 3-bit field for internal addressing so there can be only one such circuit connected to one bus. Address byte activates one chip on the bus only, so every unit must have a unique physical address. This byte usually consists of three elements: 4-bit field fixed by the producer, 3-bit field that can be set by connecting three pins of the chip to 0 (ground) or 1 (positive supply line), 1-bit field for setting the direction of communication (R/#W). Some elements (e.g. EEPROM memory chips) uses the 3-bit field for internal addressing so there can be only one such circuit connected to one bus.
-There are no special rules for the data bytes. First data byte sent by the master can be used for configuration of the slave chip. In memory units, it is used for setting the internal address of the memory for writing or reading. In multi-channel AD converters to choose the analogue input. The detailed information of the meaning of every bit of the transmission is present in the documentation of the specific integrated circuit.+There are no special rules for the data bytes. First data byte sent by the master can be used for configuration of the slave chip. In memory units, it is used for setting the internal address of the memory for writing or reading, in multi-channel AD converters to choose the analogue input. The detailed information on the meaning of every bit of the transmission is present in the documentation of the specific integrated circuit.
 The I2C standard also defines the multi-master mode, but in most of the small projects, there is one master device only. The I2C standard also defines the multi-master mode, but in most of the small projects, there is one master device only.
  
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 ===1-Wire Protocol Description=== ===1-Wire Protocol Description===
 Within the MicroLAN, there is always one master device, which may be a PC or a microcontroller unit. The master always initiates activity on the bus to avoid collisions on the network chain. If a collision occurs, the master device retries the communication. In the 1-Wire network, many devices can share the same bus line. To identify devices in the MicroLAN, each connected device has a unique 64-bit ID number. The least significant byte of the ID number defines the type of the device (temperature, voltage etc. sensors). The most significant byte represents a standard 8-bit CRC.  Within the MicroLAN, there is always one master device, which may be a PC or a microcontroller unit. The master always initiates activity on the bus to avoid collisions on the network chain. If a collision occurs, the master device retries the communication. In the 1-Wire network, many devices can share the same bus line. To identify devices in the MicroLAN, each connected device has a unique 64-bit ID number. The least significant byte of the ID number defines the type of the device (temperature, voltage etc. sensors). The most significant byte represents a standard 8-bit CRC. 
-The 1-Wire protocol description contains several broadcast commands and commands used to address the selected device. The master sends a selection command, then the address of a slave selected device. This way the next command is executed only by the addressed device. The 1-wire bus implements enumeration procedure which allows the master to get information about ID numbers of all connected slave devices to the MicroLAN network. Device address includes the device type, and a CRC allows to identify what type of slaves are currently connected to the network chain for inventory purposes. The 64-bit address space is searched as a binary tree. It allows to find up to 75 devices per second. +The 1-Wire protocol description contains several broadcast commands and commands used to address the selected device. The master sends a selection command, then the address of a slave selected device. This way, the next command is executed only by the addressed device. The 1-Wire bus implements enumeration procedure which allows the master to get information about ID numbers of all connected slave devices to the MicroLAN network. Device address includes the device type, and a CRC allows to identify what type of slaves are currently connected to the network chain for inventory purposes. The 64-bit address space is searched as a binary tree. It allows to find up to 75 devices per second. 
  
 The physical implementation of the 1-Wire network is based on an open drain master device connected to one or more open drain slaves. One single pull-up resistor for all devices pull the bus up to 3/5 V and can be used to power the slave devices. 1-Wire communication starts when a master or slave sets the bus to low voltage (connects the pull-up resistor to ground through its output MOSFET). Typical data speed of the 1-Wire interface is about 16.3 kbit/s.  The physical implementation of the 1-Wire network is based on an open drain master device connected to one or more open drain slaves. One single pull-up resistor for all devices pull the bus up to 3/5 V and can be used to power the slave devices. 1-Wire communication starts when a master or slave sets the bus to low voltage (connects the pull-up resistor to ground through its output MOSFET). Typical data speed of the 1-Wire interface is about 16.3 kbit/s. 
  
-1-Wire protocol allows for bursting the communication speed up by 10 factor. In this case, the master starts a transmission with a reset pulse pulling down the data line to 0 volts for at least 480 µs. It resets all slave devices in the network chain bus. Then, any slave device shows that it exists generating the "presence" pulse. It holds the data line low for at least 60 µs after the master releases the bus. To send a "1", the bus master sends a 1–15 µs low pulse. To send a "0", the master sends a 60 µs low pulse. The negative edge of the pulse is used to start a slave's monostable multivibrator. The slave's multivibrator clocks to read the data bus about 30 µs after the falling edge. The slave's multivibrator has analogue tolerances that affect its timing accuracy, for the "0" pulses are 60 µs long, and "1" pulses are limited to max. 15 µs. When the designed solution doesn't contain a dedicated 1-Wire interface peripheral, a UART can be used as a 1-Wire master. Dallas also offers the Serial or USB "bridge" chips, very useful when the distance between devices is long (greater than 100 m). For longer, up to 300 m buses, the simple twisted pair telephone cable can be used. It will require adjustment of pull-up resistances from 5 kΩ to 1 kΩ. The basic sequence is a reset pulse followed by an 8-bit command, and after it, data can be sent/received in groups of 8-bits. In case of transmission errors, the weak data protection 8-bit CRC checking procedure can be used. +1-Wire protocol allows for bursting the communication speed up by 10 factor. In this case, the master starts a transmission with a reset pulse pulling down the data line to 0 volts for at least 480 µs. It resets all slave devices in the network chain bus. Then, any slave device shows that it exists generating the "presence" pulse. It holds the data line low for at least 60 µs after the master releases the bus. To send a "1", the bus master sends a 1–15 µs low pulse. To send a "0", the master sends a 60 µs low pulse. The negative edge of the pulse is used to start a slave's monostable multivibrator. The slave's multivibrator clocks to read the data bus about 30 µs after the falling edge. The slave's multivibrator has analogue tolerances that affect its timing accuracy, for the "0" pulses are 60 µs long, and "1" pulses are limited to max 15 µs. When the designed solution doesn't contain a dedicated 1-Wire interface peripheral, a UART can be used as a 1-Wire master. Dallas also offers the Serial or USB "bridge" chips, very useful when the distance between devices is long (greater than 100 m). For longer, up to 300 m buses, the simple twisted pair telephone cable can be used. It will require adjustment of pull-up resistances from 5 kΩ to 1 kΩ. The basic sequence is a reset pulse followed by an 8-bit command, and after it, data can be sent/received in groups of 8-bits. In the case of transmission errors, the weak data protection 8-bit CRC checking procedure can be used. 
  
 To find the devices, the enumeration broadcast command must be sent by a master. The slave device response with all ID bits to the master and at the end it returns a 0. To find the devices, the enumeration broadcast command must be sent by a master. The slave device response with all ID bits to the master and at the end it returns a 0.
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 The DS9490B is a USB bridge and holder for a single F5-size iButton. The DS9490R is a USB bridge with 1-Wire RJ11 interface to accommodate 1-Wire receptacles and networks.  The DS9490B is a USB bridge and holder for a single F5-size iButton. The DS9490R is a USB bridge with 1-Wire RJ11 interface to accommodate 1-Wire receptacles and networks. 
 <figure label> <figure label>
-{{ :en:iot-open:introduction:ds9490_usb_bridge.png?150 |}}<caption>DS9490R USB Bridge</caption>+{{ :en:iot-open:introduction:ds9490_usb_bridge.png?150 |}}<caption>DS9490R USB Bridge.</caption>
 </figure> </figure>
-The bridge is based on the DS2490 chip developed by Dallas company, which allows to interconnect USB interface with 1-Wire bus. This required programming and electrical conversion between two different protocols in bidirectional way. The electrical wiring are present on Figure 3.+The bridge is based on the DS2490 chip developed by Dallas company, which allows to interconnect USB interface with 1-Wire bus. This required programming and electrical conversion between two different protocols in bidirectional way. The electrical wiring are present on Figure 9.
 <figure label> <figure label>
-{{ :en:iot-open:introduction:ds9490_schematic.png?600 |}}<caption>DS9490R USB schematic</caption>+{{ :en:iot-open:introduction:ds9490_schematic.png?600 |}}<caption>DS9490R USB schematic.</caption>
 </figure> </figure>
 The appropriate 1-Wire cable pinout uses RJ11 telephone connectors. The appropriate 1-Wire cable pinout uses RJ11 telephone connectors.
 <figure label> <figure label>
 {{ :en:iot-open:introduction:ds9490_rj11_pinout.png?300 |}} {{ :en:iot-open:introduction:ds9490_rj11_pinout.png?300 |}}
-<caption>DS9490 1-Wire RJ11 SOCKET pinout</caption>+<caption>DS9490 1-Wire RJ11 SOCKET pinout.</caption>
 </figure> </figure>
  
  
 ===1-Wire Products=== ===1-Wire Products===
-The list of Dallas/Maxim integrated 1-Wire devices contains a wide range of industrial implementations. The 1-Wire sensors and switches devices are very popular in the developer's community due to ease implementation. 1-Wire protocol can be fast implemented into the current IoT boards, most of the manufacturers share the software libraries allowing developers to include them in their projects in C, C++, assembly languages. The 1-Wire sensors (temperature, humidity, pressure etc.) are factory calibrated and reading the physical measurements follows the International System of Units (SI). 1-Wire products can be grouped as follows: +The list of Dallas/Maxim integrated 1-Wire devices contains a wide range of industrial implementations. The 1-Wire sensors and switches devices are very popular in the developer's community due to ease implementation. 1-Wire protocol can be fast implemented into the current IoT boards; most of the manufacturers share the software libraries allowing developers to include them in their projects in C, C++, assembly languages. The 1-Wire sensors (temperature, humidity, pressure, etc.) are factory calibrated and reading the physical measurements follows the International System of Units (SI). 1-Wire products can be grouped as follows: 
-  *   Secure Authenticators, +  *   secure authenticators, 
-  *   Memory EPROM, EEPROM ROM, +  *   memory EPROM, EEPROM ROM, 
-  *   Temperature Sensors and Temperature Switches, +  *   temperature sensors and temperature switches, 
-  *   Data Loggers, +  *   data loggers, 
-  *   1-Wire Interface Products, +  *   1-Wire interface products, 
-  *   Battery Monitors, Protectors, and Selectors, +  *   battery monitors, protectors, and selectors, 
-  *   Battery ID and Authentication, +  *   battery ID and authentication, 
-  *   Timekeeping and Real-Time Clocks.+  *   timekeeping and real-time clocks.
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