Timers

This library covers a large part of the functionality of ATmega128 timers. There are data types and functions which make usage of timers easier. Unfortunately, because of the complexity of AVR timers, there are no common functions to use different timers. Each of the timers has functions which start with the prefix of “timer” and its index.

• timer0_prescale
  Timer 0 prescaler enumeration data type. Options:
  • TIMER0_NO_PRESCALE - No prescaler (no division).
  • TIMER0_PRESCALE_8 - Clk / 8.
  • TIMER0_PRESCALE_32 - Clk / 32.
  • TIMER0_PRESCALE_64 - Clk / 64.
  • TIMER0_PRESCALE_128 - Clk / 128.
  • TIMER0_PRESCALE_256 - Clk / 256.
  • TIMER0_PRESCALE_1024 - Clk / 1024.

• timer2_prescale
  Timer 2 prescaler enumeration data type. Options:
  • TIMER2_NO_PRESCALE - No prescaler (no division).
  • TIMER2_PRESCALE_8 - Clk / 8.
  • TIMER2_PRESCALE_64 - Clk / 64.
  • TIMER2_PRESCALE_256 - Clk / 256.
  • TIMER2_PRESCALE_1024 - Clk / 1024.
  • TIMER2_PRESCALE_T2_FALLING - Clock on pin T2 falling edge.
  • TIMER2_PRESCALE_T2_RISING - Clock on pin T2 rising edge.

• timer1_prescale
• timer3_prescale
  Timer 1/3 prescaler enumeration data type. Options (“n” means 1 or 3):
  • TIMERn_NO_PRESCALE - No prescaler (no division).
  • TIMERn_PRESCALE_8 - Clk / 8.
  • TIMERn_PRESCALE_64 - Clk / 64.
  • TIMERn_PRESCALE_256 - Clk / 256.
  • TIMERn_PRESCALE_1024 - Clk / 1024.
  • TIMERn_PRESCALE_Tn_FALLING - Clock on pin Tn falling edge.
  • TIMERn_PRESCALE_Tn_RISING - Clock on pin Tn rising edge.

• timer1_ctc_top
• timer3_ctc_top
  Timer 1/3 CTC mode top value enumeration data type. Options (“n” means 1 or 3):
  • TIMERn_CTC_TOP_OCRA - Top value from timer 1/3 output compare register A.
  • TIMERn_CTC_TOP_ICR - Top value from timer 1/3 input capture register.

• timer1_fast_pwm_top
• timer3_fast_pwm_top
  Timer 1/3 fast PWM mode top value enumeration data type. Options (“n” means 1 or 3):
  • TIMERn_FAST_PWM_TOP_256 - Top value 255.
  • TIMERn_FAST_PWM_TOP_512 - Top value 511.
  • TIMERn_FAST_PWM_TOP_1024 - Top value 1023.
  • TIMERn_FAST_PWM_TOP_ICR - Top value from timer 1/3 input capture register.
  • TIMERn_PAST_PWM_TOP_OCRA - Top value from timer 1/3 output compare register A.

• timer1_fast_pwm_output_mode
• timer1_fast_pwm_output_mode
  Timer 1/3 fast PWM mode outputs configuration enumeration data type. Options (“n” means 1 or 3):
  • TIMERn_FAST_PWM_OUTPUT_DISABLE - No output.
  • TIMERn_FAST_PWM_OUTPUT_TOGGLE_ON_MATCH - Output toggles on compare match.
  • TIMERn_FAST_PWM_OUTPUT_CLEAR_ON_MATCH - Output clears on compare match.
  • TIMERn_FAST_PWM_OUTPUT_SET_ON_MATCH - Output sets on compare match.

• void timer0_init_normal(timer0_prescale prescale)
  

Initializes timer 0 in normal mode. In this mode the timer counts from 0 to 255 (including). Overflow interrupt can be used. Parameters:

• prescale - Prescaler.

• void timer2_init_normal(timer2_prescale prescale)
  

Initializes timer 2 in normal mode. In this mode timer counts from 0 to 255 (including). Overflow interrupt can be used. Parameters:

• prescale - Prescaler.

• void timer0_stop()
• void timer2_stop()
  

Stops timer 0/2.

• unsigned char timer0_get_value(void)
• unsigned char timer2_get_value(void)
  

Returns timer 0/2 current value. Parameters:

• Return 8-bit timer value.

• void timer0_set_value(unsigned char value)
• void timer2_set_value(unsigned char value)
  

Sets timer 0/2 value. Parameters:

• value - New 8-bit timer value.

• void timer0_overflow_interrupt_enable(bool enable)
• void timer2_overflow_interrupt_enable(bool enable)
  

Enables or disables timer 0/2 overflow interrupt. The name of the interrupt vector is “TIMERn_OVF_vect” where “n” represents 0 or 2. Parameters:

• enable - true to enable interrupt, false to disable.

• bool timer0_overflow_flag_is_set(void)
• bool timer2_overflow_flag_is_set(void)
  

Checks timer 0/2 overflow flag. Parameters:

• Returns true when overflow has happened, false when not.

• void timer0_overflow_flag_clear(void)
• void timer2_overflow_flag_clear(void)
  

Resets timer 0/2 overflow flag.

• void timer1_init_normal(timer1_prescale prescale)
• void timer3_init_normal(timer3_prescale prescale)
  

Initializes timer 1/3 in normal mode. In this mode timer counts from 0 to 65535 (including). Overflow interrupt can be used. Parameters:

• prescale - Prescaler.

• void timer1_init_ctc(timer1_prescale prescale, timer1_ctc_top top)
• void timer3_init_ctc(timer3_prescale prescale, timer3_ctc_top top)
  

Initializes timer 1/3 in CTC (Clear Timer on Compare Match) mode. In this mode timer counts to specified top value. Overflow interrupt can be used. Parameters:

• prescale - Prescaler.
• top - Timer top value selection. Actual value must be specified with register selected as a top value holder.

• void timer1_init_fast_pwm(timer1_prescale prescale, timer1_fast_pwm_top top, timer1_fast_pwm_output_mode output_a, timer1_fast_pwm_output_mode output_b, timer1_fast_pwm_output_mode output_c)
• void timer3_init_fast_pwm(timer3_prescale prescale, timer3_fast_pwm_top top, timer3_fast_pwm_output_mode output_a, timer3_fast_pwm_output_mode output_b, timer3_fast_pwm_output_mode output_c)
  

Initializises timer 1/3 in fast PWM mode. In this mode timer counts to a specified value, which also determines the period of the PWM signal. Timer 1/3 has three 3 output compare units (A, B and C) to generate PWM signals. Overflow and compare match interrupts can be used. Parameters:

• prescale - Prescaler.
• top - Timer top value selection. Actual value must be specified with register selected as a top value holder.
• output_a - Output compare unit A pin configuration.
• output_b - Output compare unit B pin configuration.
• output_c - Output compare unit C pin configuration.

• void timer1_stop()
• void timer3_stop()
  

Stops timer 1/3.

• unsigned char timer1_get_value(void)
• unsigned char timer3_get_value(void)
  

Returns timer 1/3 current value. Parameters:

• Returns 16-bit timer value.

• void timer1_set_value(unsigned char value)
• void timer3_set_value(unsigned char value)
  

Sets timer 0/2 value. Parameters:

• value - New 16-bit timer value.

• unsigned short timer1_get_compare_match_unitA_value(void)
• unsigned short timer1_get_compare_match_unitB_value(void)
• unsigned short timer1_get_compare_match_unitC_value(void)
• unsigned short timer3_get_compare_match_unitA_value(void)
• unsigned short timer3_get_compare_match_unitB_value(void)
• unsigned short timer3_get_compare_match_unitC_value(void)
  

Returns timer 1/3 output compare unit A/B/C compare match register value. Parameters:

• Returns 16-bit compare match register value.

• void timer1_set_compare_match_unitA_value(unsigned short value)
• void timer1_set_compare_match_unitB_value(unsigned short value)
• void timer1_set_compare_match_unitC_value(unsigned short value)
• void timer3_set_compare_match_unitA_value(unsigned short value)
• void timer3_set_compare_match_unitB_value(unsigned short value)
• void timer3_set_compare_match_unitC_value(unsigned short value)
  

Sets timer 1/3 output compare unit A/B/C compare match register value. Parameters:

• value - New 16-bit compare match register value.

• unsigned short timer1_get_input_capture_value(void)
• unsigned short timer3_get_input_capture_value(void)
  

Returns timer 1/3 input capture register value. Parameters:

• Returns 16-bit input capture register value.

• void timer1_set_input_capture_value(unsigned short value)
• void timer3_set_input_capture_value(unsigned short value)
  

Sets timer 1/3 input capture register value. Parameters:

• value - New 16-bit input capture register value.

• void timer1_overflow_interrupt_enable(bool enable)
• void timer3_overflow_interrupt_enable(bool enable)
  

Enables or disables timer 1/3 overflow interrupt. The name of the interrupt vector is “TIMERn_OVF_vect” where “n” represents 1 või 3. Parameters:

• enable - true to enable interrupt, false to disable.

• void timer1_compare_match_unitA_interrupt_enable(bool enable)
• void timer1_compare_match_unitB_interrupt_enable(bool enable)
• void timer1_compare_match_unitC_interrupt_enable(bool enable)
• void timer3_compare_match_unitA_interrupt_enable(bool enable)
• void timer3_compare_match_unitB_interrupt_enable(bool enable)
• void timer3_compare_match_unitC_interrupt_enable(bool enable)
  

Enables or disables timer 1/3 output compare unit A/B/C compare match interrupt. The name of the interrupt vector is “TIMERn_COMPx_vect” where “n” represents 1 or 3 and “x” represents A, B or C. Parameters:

• enable - true to enable interrupt, false to disable.

• void timer1_input_capture_interrupt_enable(bool enable)
• void timer3_input_capture_interrupt_enable(bool enable)
  

Enables or disables timer 1/3 input capture interrupt. The name of the interrupt vector is “TIMERn_CAPT_vect”, where “n” represents 1 or 3. Parameters:

• enable - true to enable interrupt, false to disable.

• bool timer1_overflow_flag_is_set(void)
• bool timer3_overflow_flag_is_set(void)
  

Checks timer 1/3 overflow flag. Parameters:

• Returns true when overflow has happened, false when not.

• bool timer1_input_capture_flag_is_set(void)
• bool timer3_input_capture_flag_is_set(void)
  

Checks timer 1/3 input capture flag. Parameters:

• Returns true when input capture has done, false when not.

• void timer1_overflow_flag_clear(void)
• void timer3_overflow_flag_clear(void)
  

Resets timer 1/3 overflow flag.

• void timer1_input_capture_flag_clear(void)
• void timer3_input_capture_flag_clear(void)
  

Resets timer 1/3 input capture flag.

In the following program timer 0 is started in normal mode with overflow interrupt.

#include <homelab/timer.h>
#include <avr/interrupt.h>
 
// Overflow interrupt program.
ISR(TIMER0_OVF_vect)
{
}
 
int main(void)
{	
	// Initializing of timer 0 in normal mode.
	timer0_init_normal(TIMER0_PRESCALE_32);
 
	// Enabling timer 0 overflow interrupt.
	timer0_overflow_interrupt_enable(true);
 
	// Global interrupts enabling.
	sei();
}